1. Field of the Invention
The present invention relates to a Schottky barrier diode and a heterojunction semiconductor device employing a Schottky junction.
2. Description of the Related Art
Examples of semiconductor devices include the above-mentioned Schottky barrier diode (referred to as an SBD hereinafter) or those employing Schottky junctions such as metal-semiconductor field effect transistors (referred to as an MESFET hereinafter), high electron mobility transistors (referred to as an HEMT hereinafter) and metal-semiconductor-metal light receiving elements (referred to as an MSM hereinafter). In order to obtain excellent device characteristics, such semiconductor devices employing Schottky junctions are required to have a Schottky junction which has small leakage current.
Current passing through the Schottky junction depends on the height of the barrier. It is a known fact that the higher the barrier is, the smaller the leakage current becomes. Therefore, in the prior art, attempts have been made to reduce the leakage current by increasing the barrier height. For example, a structure has been suggested where, a Schottky contact layer (referred to as a Schottky layer hereinafter) made of a single layer or double layers is provided between a semiconductor operating layer and a metal electrode in order to increase the barrier height in a case where the semiconductor operating layer is made of a material having a low Schottky barrier height. Usually, the Schottky layer is made of a semiconductor having a high Schottky barrier and its thickness is made thinner than the depletion layer of the Schottky junction formed after the insertion of the Schottky layer.
A semiconductor device having a Schottky layer made of a single layer is disclosed, for example, in "InP and Related Material Conf., SantaBarbara, USA, p419, 1994". FIG. 13 illustrates a cross-sectional structure of this semiconductor device (prior art example 1). The semiconductor device is configured as follows. An InAlAs buffer layer 102, an InGaAs channel layer 103, an InAlAs spacer layer 104 and an InAlAs electron supply layer 105 are laminated in this order on an InP substrate 101. An InAlAs first Schottky layer 106a is laminated thereon, and a couple of InGaAs ohmic contact layers 107 (referred to as an ohmic layer hereinafter) separated from each other are further formed thereon. A gate electrode 108 is formed on the exposed part of the first Schottky layer 106a, and a source electrode 109 and a drain electrode 110 are formed on each of the ohmic layers 107, respectively.
It has been reported that in prior art example 1 of this disclosure, gate leakage current can be reduced by forming the InAlAs Schottky layer 106a with respect to the InGaAs channel layer 103. However, this semiconductor device has a problem in that the leakage current is still large as compared to an HEMT made of AlGaAs/GaAs.
In order to further reduce the leakage current, a semiconductor device having a Schottky layer of double layer structure (prior art example 2) has been proposed (for example, IEEE Electron Device Lett., December 1988, Vol. 9, No. 12, p647; and Japanese Laid-Open Patent Publication No. 5-160161). FIG. 14 illustrates a cross-sectional structure of this semiconductor device. The semiconductor device includes an InAlAs buffer layer 102, an InGaAs channel layer 103, an InAlAs spacer layer 104 and an InAlAs electron supply layer 105 laminated in this order on an InP substrate 101. A Schottky layer of double layer structure made of an InAlAs first Schottky layer 106a and an InAlP second Schottky layer 106b is formed thereon, and a couple of InGaAs ohmic layers 107 separated from each other are further formed thereon. A gate electrode 108 is formed on the exposed part of the second Schottky layer 106b, and a source electrode 109 and a drain electrode 110 are formed on each of the ohmic layers 107, respectively.
In prior art example 2, it was observed that the leakage current was reduced by using the Schottky layer of double structure made of the InAlAs first Schottky layer 106a and the InAlP second Schottky layer 106b. In this example, since the InAlP was in a state of lattice mismatch with the InP substrate, its thickness was chosen to be equal to or less than the critical film thickness so as to obtain a strained layer without any dislocation.
FIGS. 7A, 7B and 7C illustrate energy band structures of the Schottky junction which has a Schottky layer of double layer structure and is made of an n-type semiconductor layer and a metal electrode. Hereinafter, a difference between the Fermi level E.sub.F of a metal constituting the metal electrode and the highest point in the conduction band of the semiconductor layer will be referred to as the barrier height and designated by .PHI.b. Moreover, Ec designates the energy level at the bottom of the conduction band, .DELTA.Ec designates discontinuity in the conduction band between the second Schottky layer and the first Schottky layer, Vi designates a voltage drop in the second Schottky layer, d designates the layer thickness of the second Schottky layer and .PHI.b1 designates the barrier height between the metal electrode and the second Schottky layer. Furthermore, a value calculated from the following equations (1) and (2) while applying the thermionic emission model (S. M. Sze, "Physics of Semiconductor Devices", New York, Wiley. 1981, p.258) to the Schottky junction, referring to current and temperature characteristics of the Schottky junction, is referred to as the effective barrier height and designated by .PHI.b.sup.eff. EQU J=Jsexp (qV/kT)-1! (1) EQU Js=A*T.sup.2 exp (-q.PHI..sub.b.sup.eff /kT) (2)
where A* is effective Richardson constant, T is an absolute temperature, q is an electronic charge and k is Boltzmann's constant.
In a Schottky layer which is made of two semiconductor layers having different electron affinities such as the one illustrated in FIGS. 7A, 7B and 7C, the layer to the metal electrode side is referred to as an upper layer and the layer to the semiconductor operating layer side is referred to as a lower layer.
A relationship between the barrier height and the electron affinity in the semiconductor layer in such a Schottky layer of double layer structure is disclosed in the Journal of Applied Physics, December 1994, Vol. 76, No. 12, p7931 to p7934. According to this reference, neglecting a mirror effect, if the upper layer is formed of a semiconductor layer which has smaller electron affinity than that of the semiconductor layer used for the lower layer, then the barrier height does not depend on a bias voltage as illustrated in FIG. 7A. On the other hand, if the upper layer is formed of a semiconductor layer which has larger electron affinity than that of the semiconductor layer used for the lower layer, the barrier height does depend on a bias voltage as illustrated in FIGS. 7B and 7C and the following equations (3) and (4). EQU .PHI..sub.b =.PHI..sub.b1 +.DELTA.Ec-Vi(.DELTA.Ec&gt;Vi) (3) EQU .PHI..sub.b =.PHI..sub.b1 (.DELTA.Ec&lt;Vi) (4)
When the carrier concentration is high or a backward bias voltage is being applied, electric field intensity inside the depletion layer increases and a relation .DELTA.Ec&lt;Vi results, and consequently, a barrier between the upper layer and the lower layer due to .DELTA.Ec does not contribute to the Schottky barrier height. Therefore, in order to obtain a noticeable effect of increasing the Schottky barrier height by employing double layer structure, it is necessary to use a semiconductor layer having small electron affinity for the upper layer.
As described above, when the prior art Schottky layer is used, the following problems arise.
First, since the prior art Schottky layer of double layer structure poses a restriction that a semiconductor layer having small electron affinity be used for the upper layer, there is a possibility that some sort of inconvenience results during crystalline growth or in production processes for the device. For example, in a case where a Schottky layer of double layer structure made of an In.sub.0.75 Al.sub.0.25 P layer and an In.sub.0.52 Al.sub.0.48 As layer is to be formed between an InGaAs operating layer and a metal electrode formed on an InP substrate, the prior art Schottky layer requires that the In.sub.0.75 Al.sub.0.25 P layer having smaller electron affinity be used for the upper layer. This reduces the leakage current. However, when heat treatment at 350.degree. C. for one minute was performed on such device, considerable deterioration of the Schottky characteristics was observed. This is believed to be a result of the diffusion of the metal constituting the metal electrode into the semiconductor layer. Consequently, in order to improve the thermal stability of the Schottky junction, it is necessary to increase the layer thickness of the upper layer adjacent to the metal layer. On the other hand, since the In.sub.0.75 Al.sub.0.25 P is in a relation of lattice mismatch with the InP, its thickness must be equal to or less than the critical film thickness. The critical film thickness of the In.sub.0.75 Al.sub.0.25 P is about 11 nm. If the film thickness exceeds this, then dislocations occur in the strained layer, resulting in deterioration of the Schottky characteristics. Therefore, in the prior art Schottky layer of double layer structure, the thermal stability of the Schottky junction cannot be improved by increasing the film thickness of the upper layer.
Secondly, although the leakage current in the prior art Schottky layer can be reduced by increasing the barrier height regardless of whether it is of the single layer structure or double the layer structure, if the leakage current is to be reduced further, there are no alternatives but to use semiconductor layers having smaller electron affinity. Practically, the reduction of leakage current in the prior art Schottky layer depends on developments of new materials. However, due to limitations concerning crystalline growth or in processes for device production, materials which can actually be used are considerably limited. Therefore, it is very difficult to further reduce the leakage current in the prior art.